1) Field of the Invention
The present invention relates to a semiconductor device for driving a load.
2) Description of the Related Art
FIG. 1 is an illustration of one example of a load-driving circuit, where a power transistor (N-channel MOS) 3 and a load 2 are connected through a switch SW1 to a power supply 1. Concretely, the power transistor 3 is connected thereto to be placed on the power supply side with respect to the load 2 between the power supply 1 and the ground, with the power transistor 3 being used as a high-side switch. The load-driving circuit, including this power transistor 3, is made in the form of a composite IC, and on one chip are integrated the power transistor 3, a gate driving circuit 4, a clock generating circuit 5, a signal processing logic circuit 8, a constant-voltage circuit 6 and a power-on reset circuit 7. Moreover, in the gate driving circuit 4 are integrated a bipolar analog circuit and a CMOS logic circuit. Still moreover, data are interchanged between a microcomputer 10 and the signal processing logic circuit 8, and a drive signal is supplied from the signal processing logic circuit 8 to the gate driving circuit 4 to turn on the power transistor 3 for energizing the load 2. On the other hand, a signal (power-on reset signal) from the power-on reset circuit 7 can stop the signal processing logic circuit 8 at power-on (the start of the power supply).
Meanwhile, in the case of the arrangement of such a composite IC, although the power-on reset circuit 7 can certainly stop the signal processing logic circuit 8 at the power-on, there is a possibility that, because the CMOS logic circuit and the bipolar analog circuit exist in a state mixed with each other in the gate driving circuit 4, the drive stop thereof becomes difficult. In detail, the bipolar analog circuit (bipolar transistor) is put to use due to the power supply withstand voltage limitation, and a level conversion MOS logic circuit becomes necessary to drive the bipolar transistor through the use of a drive circuit (digital signal). In the case of the employment of this MOS logic circuit, at power-on, the transistor of the bipolar analog circuit operates before the level conversion MOS logic circuit functions, so the power MOS transistor 3 falls into a half-on condition to make a current flow through the load 2.
The present invention has been developed in consideration of the above-mentioned situations, and it is therefore an object of the invention to provide, in a composite IC made by integrating a power transistor, a bipolar analog circuit and a MOS logic circuit, a load-driving semiconductor device capable of certainly bringing the power transistor into an off-condition in response to power-on to stop the driving of a load.
For this purpose, in accordance with the present invention, in a level conversion MOS logic circuit, a level of a drive signal is converted into a predetermined electric potential and outputted as a drive signal for a bipolar analog circuit. This signal adjusts an electric potential at a control terminal of a power transistor in the bipolar analog circuit and turns on the power transistor to energize a load.
Although the drive signal is fed through the level conversion MOS logic circuit to the bipolar analog circuit to turn on the power transistor, in a case in which, at power-on, a transistor of the bipolar analog circuit operates before the level conversion MOS logic circuit functions, the electric potential at the control terminal of the power transistor rises when the drive signal is in an non-outputted condition, so that the power transistor tends to fall into a half-on condition.
On the other hand, according to the present invention, the forcibly stopping bipolar transistor is, at its base terminal, responsive to a signal which inverts when a drive voltage exceeds a predetermined value in accordance with the power-on to take an on-condition for stopping the driving of the bipolar analog circuit. This avoids the rise of the electric potential at the control terminal of the power transistor to maintain the power transistor in an off-condition.
Thus, in the composite IC comprising an integration of the power transistor, the bipolar analog circuit and the MOS logic circuit, the power transistor can certainly be set in an off-condition at the power-on to stop the driving of the load.
In addition, according to the present invention, in the level conversion MOS logic circuit, the level of the drive signal is converted into a predetermined electric potential and outputted as a drive signal for the bipolar analog circuit. This signal controls the power supply to a charge pump in the bipolar analog circuit. On the other hand, on the basis of the drive signal, a charge pump driving MOS logic circuit makes the charge pump conduct a boosting operation. The charge pump is operated in this way to adjust the electric potential at the control terminal of the power transistor and turn on the power transistor for energizing the load.
Although the drive signal is fed through the level conversion MOS logic circuit to the bipolar analog circuit to turn on the power transistor, in a case in which, at power-on, a transistor of the bipolar analog circuit operates before the level conversion MOS logic circuit functions, the electric potential at the control terminal of the power transistor rises when the drive signal is in an non-outputted condition, so that the power transistor tends to fall into a half-on condition.
On the other hand, according to the present invention, the forcibly stopping bipolar transistor is, at its base terminal, responsive to a signal which inverts when a drive voltage exceeds a predetermined value in accordance with the power-on to take an on-condition for stopping the driving of the bipolar analog circuit. This avoids the rise of the electric potential at the control terminal of the power transistor to maintain the power transistor in an off-condition.
Thus, in the composite IC comprising an integration of the power transistor, the bipolar analog circuit and the MOS logic circuit, the power transistor can certainly be set in an off-condition at the power-on to stop the driving of the load.
In this case, preferably, the power transistor is used as a high-side switch.
Furthermore, it is also appropriate that the level conversion MOS logic circuit comprises a constant-current circuit, a MOS transistor connected in series to the constant-current circuit for outputting, as a drive signal for the bipolar analog circuit, a signal with a predetermined electric potential through on/off operations and an inverter for receiving the drive signal to output it to a gate terminal of the MOS transistor. Since the MOS transistor does not function normally from which the power is brought into the on-condition until it reaches its threshold voltage Vt, a current from the constant-current circuit which functions before the timing of reaching the threshold voltage Vt comes in a base terminal of the bipolar transistor in the bipolar analog circuit so that the voltage at the base terminal of the bipolar transistor in the bipolar analog circuit rises to turn on the bipolar transistor, which increases the gate voltage of the power transistor through the charge pump to make the power transistor fall into a half-on condition. The above-mentioned arrangement according to the present invention can eliminate this problem.